Objectives

Develop a completely European, International Traffic in Arms Regulations (ITAR) free, high performance, 32-bit microcontroller for space applications, focused on small satellites, flight control and payload computers. The processor core is based on a novel IHP Peaktop architecture, including novel, European instruction set which is orthogonal, regular and circular. The microcontroller System-on-Chip (SoC) is scalable, highly customizable and flexible, and can be easily tailored for a wide range of applications. Furthermore, it is designed and verified with modern techniques based on SystemVerilog. Besides the processor, the required ITAR-free middleware, Real-Time Separation Kernel (RTSK) and software toolchain will also be available. Achievement of Technology Readiness Level (TRL) 6 is planned.
As a result of the microcontroller development, establish a new European company held by the two core partners involved in this project, which will target the European market. This new company, as the last stage of the evolution of the project, will sell the microcontroller chip and its accompanying software, and give support to the market. It will be focused to produce a microcontroller that can bootstrap the European market for space applications. In particular, we will target the fast growing small satellite market.