The PEAKTOP ISA has it origins at the Faculty of Electrical Engineering and Information Technologies (FEEIT) – Skopje, Macedonia (, in the magister work of Aleksandar Simevski under the mentorship of Prof. Dr. Aristotel Tentov which started in 2007. In January 2010, the defense of the magister thesis took place in Skopje, with co-mentoring from Prof. Dr. Rolf Kraemer, also a member of the thesis committee (together with Prof. Tentov and the Dean of FEEIT at that time Prof. Dr. Mile Stankovski). Prof. Kraemer is a professor at the Brandenburgische Technische Universität (BTU) Cottbus- Senftenberg, Germany (, and a head of the System Design Department in the state research institute IHP Microelectronics ( The cooperation between IHP and FEEIT was initiated in a project funded by Deutscher Akademischer Austauschdienst (DAAD). At that time, the PEAKTOP ISA was designed, but an implementation was lacking. Aleksandar Simevski after the defense of the magister thesis moved to Germany for obtaining the PhD degree at BTU under the mentorship of Prof. Kraemer, with a scholarship provided by the German state of Brandenburg. An 8-core multiprocessor based on the PEAKTOP ISA v1.2.5.2 was then implemented, produced and tested successfully in IHP 130 nm technology. This chip was used as a demonstrator for a dynamically-adaptable multiprocessor framework, named Waterbear which was developed in the PhD thesis.


If one assumes that the word PEAKTOP is written in Cyrillic, he will read it as “REACTOR”, which is actually the original name of the architecture, inspired from the nuclear reactor. However, virtually all of the people whose native language is written in Cyrillic assume that the word is written in English, and they like the name because it represents the “top of the peak”, or “the highest peak of all”. Thus, the name remained, and it can be read in both ways. Therefore, in this document it is always written with upper case letters because of the “double” meaning.

Download: peaktop_isa_v1_3_10_5_r210104.pdf